"Modeling of DG-Tunnel FET for low power VLSI circuit design."

Sunil Kumar, Balwinder Raj (2015)

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DOI: 10.1109/IC3.2015.7346724

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Sunil Kumar, Balwinder Raj:
Modeling of DG-Tunnel FET for low power VLSI circuit design. IC3 2015: 455-458

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