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"A Concurrency Control in Hardware Transactional Memory Considering ..."

Anju Hirota, Keisuke Mashita, Tomoaki Tsumura (2016)

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DOI: 10.1109/CANDAR.2016.0026

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/ic-nc/HirotaMT16
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  persistent URL:
  - https://dblp.org/rec/conf/ic-nc/HirotaMT16
Anju Hirota, Keisuke Mashita, Tomoaki Tsumura:
A Concurrency Control in Hardware Transactional Memory Considering Execution Path Variation. CANDAR 2016: 77-83

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