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"On-chip Sparse Learning with Resistive Cross-point Array Architecture."

Shimeng Yu, Yu Cao (2015)

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DOI: 10.1145/2742060.2743757

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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Shimeng Yu, Yu Cao:
On-chip Sparse Learning with Resistive Cross-point Array Architecture. ACM Great Lakes Symposium on VLSI 2015: 195-197

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