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"The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA."

Jong-Ru Guo et al. (2004)

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DOI: 10.1145/988952.988987

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-29

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  - conf/glvlsi/GuoYCCZDGKM04
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  - https://dblp.org/rec/conf/glvlsi/GuoYCCZDGKM04
Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald:
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI 2004: 141-144

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