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"Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs."

Álvaro Vázquez, Florent de Dinechin (2010)

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DOI: 10.1109/FPT.2010.5681767

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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  dblp key:
  - conf/fpt/VazquezD10
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  - https://dblp.org/rec/conf/fpt/VazquezD10
Álvaro Vázquez, Florent de Dinechin:
Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs. FPT 2010: 126-133

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