"Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs."

Yuan Xue et al. (2015)

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DOI: 10.1109/FPL.2015.7294013

access: closed

type: Conference or Workshop Paper

metadata version: 2017-11-06

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  dblp key:
  - conf/fpl/XueCYH15
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  - https://dblp.org/rec/conf/fpl/XueCYH15
Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu:
Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs. FPL 2015: 1-8

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