default search action
"Pipelined Floating Point Arithmetic Optimized for FPGA Architectures."
Iakovos Stamoulis, Martin White, Paul F. Lister (1999)
- Iakovos Stamoulis, Martin White, Paul F. Lister:
Pipelined Floating Point Arithmetic Optimized for FPGA Architectures. FPL 1999: 365-370
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.