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"Delay Minimal Mapping of RTL Structures onto LUT Based FPGAs."
A. R. Naseer, M. Balakrishnan, Anshul Kumar (1995)
- A. R. Naseer, M. Balakrishnan, Anshul Kumar:
Delay Minimal Mapping of RTL Structures onto LUT Based FPGAs. FPL 1995: 139-148
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