"Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA ..."

Michael Feilen et al. (2012)

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DOI: 10.1109/FPL.2012.6339244

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Michael Feilen, Matthias Ihmig, Christian Schwarzbauer, Walter Stechele:
Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources. FPL 2012: 75-82

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