"A Novel Partial Bitstream Merging Methodology Accelerating Xilinx ..."

Carsten Bieser et al. (2006)

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DOI: 10.1109/FPL.2006.311294

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type: Conference or Workshop Paper

metadata version: 2017-05-21

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Carsten Bieser, Martin Bahlinger, Matthias Heinz, Christian Stops, Klaus D. Müller-Glaser:
A Novel Partial Bitstream Merging Methodology Accelerating Xilinx Virtex-II FPGA Based RP System Setup. FPL 2006: 1-4

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