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"Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in ..."

Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet (2009)

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DOI: 10.1145/1508128.1508136

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/fpga/TeehanLG09
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  - https://dblp.org/rec/conf/fpga/TeehanLG09
Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet:
Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs. FPGA 2009: 43-52

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