"Timing yield improvement of FPGAs utilizing enhanced architectures and ..."

Fatemeh Sadat Pourhashemi, Morteza Saheb Zamani (2012)

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DOI: 10.1145/2145694.2145742

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Fatemeh Sadat Pourhashemi, Morteza Saheb Zamani:
Timing yield improvement of FPGAs utilizing enhanced architectures and multiple configurations under process variation (abstract only). FPGA 2012: 265

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