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"Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial ..."

Jae-Jin Lee, Gi-Yong Song (2004)

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DOI: 10.1145/968280.968328

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Jae-Jin Lee, Gi-Yong Song:
Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial semi-systolic multiplier. FPGA 2004: 249

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