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"200 MS/s ADC implemented in a FPGA employing TDCs."

Harald Homulle, Francesco Regazzoni, Edoardo Charbon (2015)

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DOI: 10.1145/2684746.2689070

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-31

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  dblp key:
  - conf/fpga/HomulleRC15
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  - https://dblp.org/rec/conf/fpga/HomulleRC15
Harald Homulle, Francesco Regazzoni, Edoardo Charbon:
200 MS/s ADC implemented in a FPGA employing TDCs. FPGA 2015: 228-235

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