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"SMART: High-Performance SAR ATR Through Model-Architecture Co-Design on FPGA."
Sachini Wickramasinghe et al. (2025)
- Sachini Wickramasinghe, Yi-Chien Lin, Cauligi S. Raghavendra, Viktor K. Prasanna:
SMART: High-Performance SAR ATR Through Model-Architecture Co-Design on FPGA. FCCM 2025: 75-84

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