"VLSI implementation and complexity comparison of residue generators modulo 3."

Stanislaw J. Piestrak, Fabrice Pedron, Olivier Sentieys (1998)

> Home

Details and statistics

DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-09

- view
  - electronic edition @ ieee.org
- export record
  dblp key:
  - conf/eusipco/PiestrakPS98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/eusipco/PiestrakPS98
Stanislaw J. Piestrak, Fabrice Pedron, Olivier Sentieys:
VLSI implementation and complexity comparison of residue generators modulo 3. EUSIPCO 1998: 1-4

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.