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"FPGA Implementation of a TVWS Up- and Downconverter Using Non-Power-of-Two ..."

Vianney Anis et al. (2019)

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DOI: 10.23919/EUSIPCO.2019.8902588

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-16

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  dblp key:
  - conf/eusipco/AnisGWC19
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  - https://dblp.org/rec/conf/eusipco/AnisGWC19
Vianney Anis, Jincheng Guo, Stephan Weiss, Louise H. Crockett:
FPGA Implementation of a TVWS Up- and Downconverter Using Non-Power-of-Two FFT Modulated Filter Banks. EUSIPCO 2019: 1-5

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