"Efficient constrained encoding for VLSI sequential logic synthesis."

Chuanjin Richard Shi, Janusz A. Brzozowski (1992)

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DOI: 10.1109/EURDAC.1992.246233

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-29

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Chuanjin Richard Shi, Janusz A. Brzozowski:
Efficient constrained encoding for VLSI sequential logic synthesis. EURO-DAC 1992: 266-271

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