"PAR-APLAC: Parallel Circuit Analysis and Optimization."

Eero Pajarre, Tapani Ritoniemi, T. Tenhunen (1992)

Details and statistics

DOI: 10.1109/EURDAC.1992.246326

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.