"Design of Floating-Point Arithmetic Unit for FPGA with Simulink®."

Jordan Kralev (2019)

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DOI: 10.1109/EUROCON.2019.8861860

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-17

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Jordan Kralev:
Design of Floating-Point Arithmetic Unit for FPGA with Simulink®. EUROCON 2019: 1-5

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