Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Electrothermal modeling of junctionless vertical Si nanowire transistors ..."

Yifan Wang et al. (2023)

> Home

Details and statistics

DOI: 10.1109/ESSDERC59256.2023.10268560

access: closed

type: Conference or Workshop Paper

metadata version: 2023-10-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/essderc/WangMRDMMOMPL23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/essderc/WangMRDMMOMPL23
Yifan Wang, Chhandak Mukherjee, Houssem Rezgui, Marina Deng, Cristell Maneux, Sara Mannaa, Ian O'Connor, Jonas Müller, Sylvain Pelloquin, Guilhem Larrieu:
Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. ESSDERC 2023: 57-60

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.