Stop the war!
Остановите войну!
for scientists:
default search action
"An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold ..."
Kentaro Yoshioka et al. (2012)
- Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro:
An 8bit 0.35-0.8V 0.5-30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator. ESSCIRC 2012: 381-384
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.