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"A high-speed median filter VLSI using floating-gate-MOS-based low-power ..."

Hideo Yamasaki, Tadashi Shibata (2005)

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DOI: 10.1109/ESSCIR.2005.1541575

access: closed

type: Conference or Workshop Paper

metadata version: 2023-04-28

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  dblp key:
  - conf/esscirc/YamasakiS05a
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Hideo Yamasaki, Tadashi Shibata:
A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuits. ESSCIRC 2005: 125-128

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