"Optimizing the FPGA Memory Design for a Sobel Edge Detector."

Craig Moore, Harald Devos, Dirk Stroobandt (2009)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2009-11-03

- no documents available
- export record
  dblp key:
  - conf/ersa/MooreDS09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ersa/MooreDS09
Craig Moore, Harald Devos, Dirk Stroobandt:
Optimizing the FPGA Memory Design for a Sobel Edge Detector. ERSA 2009: 299-300

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.