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"Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep ..."

Narasimha Rao Konijeti, J. V. R. Ravindra, Pandurangaiah Yagateela (2013)

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DOI: 10.1109/EMS.2013.117

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Narasimha Rao Konijeti, J. V. R. Ravindra, Pandurangaiah Yagateela:
Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep Submicron Technology. EMS 2013: 697-700

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