"The Relationship between Packaging Structures, Chip Area and Thermal ..."

Fan Chen et al. (2021)

> Home

Details and statistics

DOI: 10.1145/3501409.3501417

access: closed

type: Conference or Workshop Paper

metadata version: 2023-08-04

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/eitce/ChenLCTYK21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/eitce/ChenLCTYK21
Fan Chen, Dapeng Liu, Long Chen, Shuai Tao, Jun You, Zebin Kong:
The Relationship between Packaging Structures, Chip Area and Thermal Resistance of NMOS Semiconductor in Transient Dual Interface Method. EITCE 2021: 39-43

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.