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"A Bit Plane Architecture For An Image Analysis Processor Implemented With ..."

Jean-Claude Klein, François Collange, Michel Bilodeau (1990)

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DOI: 10.1007/BFB0014848

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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  dblp key:
  - conf/eccv/KleinCB90
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Jean-Claude Klein, François Collange, Michel Bilodeau:
A Bit Plane Architecture For An Image Analysis Processor Implemented With P.L.C.A. Gate Array. ECCV 1990: 33-49

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