"A low voltage CMOS analog multiplier with high linearity."

Amir H. Miremadi et al. (2009)

> Home

Details and statistics

DOI: 10.1109/ECCTD.2009.5274936

access: closed

type: Conference or Workshop Paper

metadata version: 2020-12-29

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ecctd/MiremadiAAS09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ecctd/MiremadiAAS09
Amir H. Miremadi, Ahmad Ayatollahi, Adib Abrishamifar, Alireza Siadatan:
A low voltage CMOS analog multiplier with high linearity. ECCTD 2009: 257-262

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.