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"A web EDA tool for the automatic generation of synthesizable VHDL ..."

Minas Dasygenis (2014)

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DOI: 10.1109/DTIS.2014.6850659

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Minas Dasygenis:
A web EDA tool for the automatic generation of synthesizable VHDL architectures for a rapid design space exploration. DTIS 2014: 1-2

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