default search action
"An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA."
Petr Fiser, Pavel Kubalík, Hana Kubátová (2008)
- Petr Fiser, Pavel Kubalík, Hana Kubátová:
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA. DSD 2008: 96-99
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.