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"Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of ..."

Lukás Sekanina, Lukás Starecek, Zdenek Kotásek (2006)

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DOI: 10.1109/DDECS.2006.1649580

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/ddecs/SekaninaSK06
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  - https://dblp.org/rec/conf/ddecs/SekaninaSK06
Lukás Sekanina, Lukás Starecek, Zdenek Kotásek:
Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules. DDECS 2006: 85-86

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