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"A 64-MHz∼640-MHz 64-phase clock generator."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Hong-Yi Huang et al. (2014)

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DOI: 10.1109/DDECS.2014.6868762

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng:
A 64-MHz∼640-MHz 64-phase clock generator. DDECS 2014: 51-54

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last updated on 2023-03-24 00:04 CET by the dblp team

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