"Cost-Efficient Synthesis for Sequential Circuits Implemented Using ..."

Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba (2007)

> Home

Details and statistics

DOI: 10.1109/DDECS.2007.4295261

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-03

- view
  authority control:
- export record
  dblp key:
  - conf/ddecs/BorowikFL07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ddecs/BorowikFL07
Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba:
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs. DDECS 2007: 99-104

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.