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"Memory elements based on minority-3 gates and inverters implemented in 90 ..."

Snorre Aunet, Amir Hasanbegovic (2010)

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DOI: 10.1109/DDECS.2010.5491770

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/ddecs/AunetH10
Snorre Aunet, Amir Hasanbegovic:
Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS. DDECS 2010: 267-272

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