"A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs."

José Luis Rosselló et al. (2005)

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DOI: 10.1109/DATE.2005.12

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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José Luis Rosselló, Vicent Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura:
A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs. DATE 2005: 206-211

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