"A verilog-a model for reconfigurable logic gates based on graphene ..."

Sandeep Miryala et al. (2013)

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DOI: 10.7873/DATE.2013.185

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  - conf/date/MiryalaMCMP13
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  - https://dblp.org/rec/conf/date/MiryalaMCMP13
Sandeep Miryala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii, Massimo Poncino:
A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. DATE 2013: 877-880

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