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"Useful-Skew Clock Routing With Gate Sizing for Low Power Design."

Joe G. Xi, Wayne Wei-Ming Dai (1996)

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DOI: 10.1145/240518.240592

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/dac/XiD96
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  persistent URL:
  - https://dblp.org/rec/conf/dac/XiD96
Joe G. Xi, Wayne Wei-Ming Dai:
Useful-Skew Clock Routing With Gate Sizing for Low Power Design. DAC 1996: 383-388

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