"Design sensitivity of single event transients in scaled logic circuits."

Jyothi Velamala et al. (2011)

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DOI: 10.1145/2024724.2024881

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-15

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Jyothi Velamala, Robert LiVolsi, Myra Torres, Yu Cao:
Design sensitivity of single event transients in scaled logic circuits. DAC 2011: 694-699

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