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"AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for ..."

Francesco Restuccia et al. (2020)

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DOI: 10.1109/DAC18072.2020.9218652

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgiomaria Cicero, Giorgio C. Buttazzo:
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC. DAC 2020: 1-6

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