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"Parallelizing SRAM arrays with customized bit-cell for binary neural networks."

Rui Liu et al. (2018)

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DOI: 10.1145/3195970.3196089

access: closed

type: Conference or Workshop Paper

metadata version: 2023-07-26

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  dblp key:
  - conf/dac/LiuPSKSCLCY18
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  persistent URL:
  - https://dblp.org/rec/conf/dac/LiuPSKSCLCY18
Rui Liu, Xiaochen Peng, Xiaoyu Sun, Win-San Khwa, Xin Si, Jia-Jing Chen, Jia-Fang Li, Meng-Fan Chang, Shimeng Yu:
Parallelizing SRAM arrays with customized bit-cell for binary neural networks. DAC 2018: 21:1-21:6

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