"4-Transistor Ternary Content Addressable Memory Cell Design using Stacked ..."

Munhyeon Kim, Jae-Joon Kim (2024)

> Home

Details and statistics

DOI: 10.1145/3649329.3655965

access: closed

type: Conference or Workshop Paper

metadata version: 2024-11-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/KimK24a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/KimK24a
Munhyeon Kim, Jae-Joon Kim:
4-Transistor Ternary Content Addressable Memory Cell Design using Stacked Hybrid IGZO/Si Transistors. DAC 2024: 335:1-335:6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.