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"COOL interconnect low power interconnection technology for scalable 3D LSI ..."

Marco Chacin et al. (2011)

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DOI: 10.1109/COOLCHIPS.2011.5890921

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-29

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  - conf/coolchips/ChacinUHMOIMISK11
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  - https://dblp.org/rec/conf/coolchips/ChacinUHMOIMISK11
Marco Chacin, Hiroyuki Uchida, Michiya Hagimoto, Takashi Miyazaki, Takeshi Ohkawa, Rimon Ikeno, Yukoh Matsumoto, Fumito Imura, Motohiro Suzuki, Katsuya Kikuchi, Hiroshi Nakagawa, Masahiro Aoyagi:
COOL interconnect low power interconnection technology for scalable 3D LSI design. COOL Chips 2011: 1-3

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