"A power-efficient and high performance FPGA accelerator for convolutional ..."

Lei Gong et al. (2017)

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DOI: 10.1145/3125502.3125534

access: closed

type: Conference or Workshop Paper

metadata version: 2021-06-22

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  dblp key:
  - conf/codes/GongWLCZ17
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  - https://dblp.org/rec/conf/codes/GongWLCZ17
Lei Gong, Chao Wang, Xi Li, Huaping Chen, Xuehai Zhou:
A power-efficient and high performance FPGA accelerator for convolutional neural networks: work-in-progress. CODES+ISSS 2017: 16:1-16:2

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