"A 1.8 V, 2.0 ns cycle, 32 KB embedded memory with interleaved castout/reload."

Steven Sullivan et al. (1999)

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DOI: 10.1109/CICC.1999.777281

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-29

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Steven Sullivan, Brad R. Johnson, Douglas Reid, Scott A. Taylor:
A 1.8 V, 2.0 ns cycle, 32 KB embedded memory with interleaved castout/reload. CICC 1999: 235-238

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