"A 0.4 V 75 kbit SRAM macro in 28 nm CMOS featuring a 3-adjacent MBU ..."

Adam Neale, Manoj Sachdev (2014)

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DOI: 10.1109/CICC.2014.6946091

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Adam Neale, Manoj Sachdev:
A 0.4 V 75 kbit SRAM macro in 28 nm CMOS featuring a 3-adjacent MBU correcting ECC. CICC 2014: 1-4

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