"142 dB ΔΣ ADC with a 100 nV LSB in a 3 V CMOS process."

Ravindranath Naiknaware, Terri S. Fiez (2000)

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DOI: 10.1109/CICC.2000.852606

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-10

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Ravindranath Naiknaware, Terri S. Fiez:
142 dB ΔΣ ADC with a 100 nV LSB in a 3 V CMOS process. CICC 2000: 5-8

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