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"Design validation of .18 μm 1 GHz cache and register arrays."
Doug Malone et al. (2000)
- Doug Malone, Paul Bunce, Joe DellaPietro, John Davis, James Dawson, Thomas J. Knips, Don Plass, Phil Pritzlaff, Kenneth Reyer:
Design validation of .18 μm 1 GHz cache and register arrays. CICC 2000: 295-298
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