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"A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation."

Gennady Feygin et al. (2001)

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DOI: 10.1109/CICC.2001.929745

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-10

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  - conf/cicc/FeyginNCHPMWP01
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  - https://dblp.org/rec/conf/cicc/FeyginNCHPMWP01
Gennady Feygin, Krishnaswamy Nagaraj, Ranjan Chattopadhyay, R. Herrera, I. Papantonopoulos, David A. Martin, P. Wu, Shanthi Pavan:
A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation. CICC 2001: 153-156

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