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"A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS."

Ahmed Elmallah et al. (2018)

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DOI: 10.1109/CICC.2018.8357042

access: closed

type: Conference or Workshop Paper

metadata version: 2018-05-15

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Ahmed Elmallah, Mostafa Gamal Ahmed, Ahmed Elkholy, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS. CICC 2018: 1-4

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