"A FPGA vernier digital-to-time converter with 3.56ps resolution and ..."

Poki Chen, Juan-Shan Lai, Po-Yu Chen (2008)

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DOI: 10.1109/CICC.2008.4672060

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Poki Chen, Juan-Shan Lai, Po-Yu Chen:
A FPGA vernier digital-to-time converter with 3.56ps resolution and -0.23∼+0.2LSB inaccuracy. CICC 2008: 209-212

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